Digital Fractional Frequency Synthesizer Based on Counters

Authors: MILAN STORK

Abstract: This paper describes the architecture of a new pure digital frequency synthesizer based on pulse generators, counters and a register. The technique described here is much simpler than other methods. The synthesizer presented is suitable for the design of VLSI architectures or for programmable large-scale integration circuits.

Keywords: Frequency synthesizer, phase locked loop, counter, register

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