Real-time implementation of an amplitude-locked loop: a validation on the dSPACE DS1006-based platform

Authors: JORA MANGALA GONDA, SUMAM SARAH

Abstract: The extraction of harmonics and/or the fundamental from a distorted waveform is an important process in the implementation of custom-power devices. Several schemes towards this have been proposed in the past. Among these, the algorithms based on synchronous (with respect to the supply voltages) extraction (both in phase and amplitude) have certain established advantages over the others. Amplitude-locked loops (ALLs) have been in use in signal-communication systems but are limited to sinusoidal inputs. There is a need for fast and rugged algorithms to synchronously extract harmonics and/or the fundamental from a distorted waveform in many power system applications. In this paper a real-time implementation of a novel scheme, which is based on an adaptation of an ALL, is presented for synchronous extraction of harmonics and/or the fundamental from a distorted periodic waveform. The operation of the algorithm, its performance, and its design aspects are briefly discussed. The main features of this ALL are simplicity, speed of operation, noise rejection, availability of both fundamental and harmonics without much additional processing, and excellent insensitivity to distortion (robustness). Furthermore, it is applicable to single-phase or 3-phase systems. This paper reports a real-time hardware implementation of the algorithm, thereby validating it. The algorithm is implemented on a real-time hardware-emulation platform, a dSPACE modular system (configured around the DS1006 processor board). It is tested for various cases of interest and the results are presented.

Keywords: Amplitude locking, phase locking, harmonics extraction, amplitude demodulation, noise rejection

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