Design of a high performance narrowband low noise amplifier using an on-chip orthogonal series stacked differential fractal inductor for 5G applications

Authors: SUNIL KUMAR TUMMA, BHEEMARAO NISTALA

Abstract: Inductors play a crucial role in the design of radio frequency integrated circuits (RFICs) and they typically consume a considerably large area and have a low-quality factor at high frequencies. The employment of fractal structure in on-chip inductors helps in improving the quality factor and also reduces the overall area besides improving the inductance value. In this paper, an orthogonal series stacked differential fractal inductor is proposed and the same is used to design a low noise amplifier (LNA) for 5G band (27--30 GHz) applications. The proposed inductor is fabricated on a multilayer printed circuit board and the measurement results demonstrate twice the enhancement in inductance, 56 % improvement in quality factor, and 33 % reduction in series resistance when compared to the conventional series stacked fractal inductor for the equivalent on-chip area. The LNA using cascode topology with inductive source degeneration is designed and simulated at a center frequency of 28 GHz in 90 nm CMOS technology using the tool Advanced Design System. The inductors in the LNA are replaced with the proposed on-chip inductor for different layers, which contributes to high gain, better input matching, and low noise figure compared to the state-of-the-art LNAs.

Keywords: Quality factor, noise figure, input matching, gain, inductance, source degeneration

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